PCI SIG Blog:
PCI Express® (PCIe®) technology continues to evolve to meet the increasing bandwidth and performance demands of the computing industry. With each new specification, PCI-SIG® provides greater performance while maintaining backwards compatibility and interoperability. This ongoing evolution gives system architects the flexibility to select the PCIe technology generation that best meets their current performance, power, cost and lifecycle requirements, with a defined roadmap to greater bandwidth as those needs grow.
The embedded computing ecosystem is a prime example that leverages this flexibility of PCI Express technology. With longer product lifecycles and different performance requirements than data center and enterprise systems, embedded applications often adopt newer PCIe technology generations on their own timelines. The PCIe technology roadmap enables embedded designers to implement the performance their applications require today while providing a path to higher bandwidth for future generations.
In the first blog in this series, Implementation of PCIe® 5.0 and 6.0 Architecture in Embedded Applications, we explored how embedded systems are adopting PCIe 5.0 and PCIe 6.0 technology to address increasing bandwidth requirements. We identified several trends driving this transition, including smaller and faster mezzanine cards, the emergence of new Field-Programmable Gate Array (FPGA) System-on-Module (SoM) standards and the evolution of existing modular standards to PCIe 6.0 technology.
In this second blog, we will explore how PCIe technology supports the evolving FPGA SoM ecosystem and how the adoption of higher PCIe specification data rates helps address increasing bandwidth, processing and connectivity requirements.
Standardizing the Next Generation Embedded FPGA SoMs
PCIe technology has become an integral interface within modern FPGA-based technologies. Many embedded applications rely on FPGAs to accelerate specialized workloads, such as signal processing, AI, networking, and sensor processing. As FPGA performance continues to increase, it requires higher-bandwidth interconnects to communicate efficiently with processors, memory, storage and other peripherals.
As modern embedded applications evolve to adopt newer PCIe 5.0 and PCIe 6.0 specification generations, new open standards leverage these newer PCIe technologies to support higher bandwidth, improved scalability, and next-generation FPGA SoM designs. These advancements help drive innovation across many embedded markets, such as industrial automation, smart cities, healthcare and medical devices, consumer electronics and wearables, and Mil/Aero.
To support the evolving requirements of embedded applications, the Standardization Group for Embedded Technologies (SGET) developed open standards for embedded computing that leverage PCIe technology. These include the Open Standard Module (OSM) specification and Open Harmonized FPGA Module (oHFM).
OSM offers a standardized platform that simplifies integration, while supporting higher-performance interfaces and evolving PCIe technology requirements to enable higher bandwidth and next-generation computing.
The oHFM module is focused on creating an open solution for FPGA-based SoMs. It supports both PCIe 5.0 technology, which is available natively on FPGAs, and PCIe 6.0 technology.
Learn more about PCIe Technology in Embedded
For more information on PCIe technology in embedded applications, watch the recent PCI-SIG YouTube video PCIe® Technology Evolution in Embedded Applications and read the PCI-SIG Blog Implementation of PCIe® 5.0 and 6.0 Architecture in Embedded Applications.
Source:
